I need a usb3 to rs232 adapter that WORKS RIGHT

Sam E wrote:

Andy Burns wrote:

Sam E wrote:

Ethernet is serial

If you want to phrase it like that, then if it's faster than 100Mbps
and over copper, it's parallel :-)

Sounds like nonsense.

Not nonsense, just the way it works

The definitions of "serial" and "parallel" have
nothing to do with speed or conductor material.

But the definitions of ethernet specifically *do*

10Mb and 100Mb ethernet are serial because they transmit on one pair of
wires, and receive on another pair. But 1000Mbps (and 2500Mbps)
ethernet over copper transmit (and receive) over all fair pairs in parallel.

On 8/8/19 11:53 AM, T wrote:
Hi All,

I have a customer with a Mac and a w10 laptop and a CNC machine
with an RS232 (only) interface.Â* He wants to be able to send
text files to the CNC machine.Â* The Mac has USB3 and Thunderbolt
interfaces on the back.Â* The W10 laptop has usb3 ports.

Now I could go the the various accessories sites and get
such an adapter, but they are typically trash and don't
work for beans.Â* The customer did state this was his
experience.Â* (Mine too.)

Any one know of a USB3 to RS232 adapter THAT ACTUALLY
WORKS RIGHT?

Many thanks,

-T

Follow up:

Turned out there is an issue in the configuration of
the serial port on the CNC machine and the customer
does not know how to obtain a manual. When reading,
it is adding unprintable characters at the end of
each line, giving two extra line feeds or what looks
like line feeds. I could not take a copy to
look at with HexEdit due to privacy concerns with
their governments contracts.

Oh and get this, and I have seen this before, the
iMac he was so proud of was running Windows 7.
I wish they tell me when they do this as it would
be a lot less research on my part to get instructions
on how to do things on Mac OS. Oh well, I now
have a keeper file on ho to configure USB to RS232
devices on Mac OS. Wonder if I will ever use it?

The customer is calling the manufacturer of the
interface software on the computer side to see if
they can figure out why the two extra lines.

He currently have it configured for 9600 baud,
7 data bits, 2 stop bits, and Xon/Xoff. Something
does not smell right. But, I probably will never know.

-T

In article , wrote:

Oh and get this, and I have seen this before, the
iMac he was so proud of was running Windows 7.
I wish they tell me when they do this as it would
be a lot less research on my part to get instructions
on how to do things on Mac OS. Oh well, I now
have a keeper file on ho to configure USB to RS232
devices on Mac OS. Wonder if I will ever use it?

there's nothing to configure with mac os. plug it in and a serial port
becomes available.

The customer is calling the manufacturer of the
interface software on the computer side to see if
they can figure out why the two extra lines.

He currently have it configured for 9600 baud,
7 data bits, 2 stop bits, and Xon/Xoff. Something
does not smell right. But, I probably will never know.

usually it's 8/1/n, which is set by the app using the port.

On 8/15/19 4:14 AM, Carlos E.R. wrote:
Implementing an RS232 is easier.

If you know the baud rate, byte size, stops bits, and handshaking.
Plus, null modem or straight through.

My experience, not a lot of information is always forthcoming
and you have to figure it out on your own

On 8/11/19 7:44 PM, Paul wrote:
T wrote:
On 8/11/19 10:20 AM, Paul wrote:
Carlos E.R. wrote:

Notice that an USB cable (usually?) doesn't have a proper ground.
Should
be the metal outside part of the connector, but...Â* And then the
converter should pass this ground to the serial cable shield.

The voltages the converter can produce on the rs232 side are another
issue. ±12 should be good.


The USB cable has a ground.

And as a result, you have to think about potential issues
that go with grounded situations.

Â*Â*Â* Paul

That model adapter I picked out has an optical isolation
model.Â* But, the customer never had any grounding issues
with his other computers before they got moved or died.

Hmmmmmm.Â*Â* If it optically isolated, how does the RS232
side get power from the USB side?


There are ways. It can get power from the destination.

"Get power out of PC RS-232 port
Â*Tomi Engdahl 1997-2000"

http://www.epanorama.net/circuits/rspower.html

On an opto...
Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â* VCCdestÂ*Â*Â*Â*Â*Â*Â*Â* ---+
Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â* Â* |Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â* +-- RS232-status
Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â* Â* RÂ*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â* derived power
Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â* Â* |
Â*Â*Â*Â*Â*Â*Â* Input ----+Â*Â*Â*Â*Â*Â*Â* +--- recovered signal
Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â* |Â*Â*Â*Â*Â*Â*Â* |
Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â* LEDÂ*Â* phototransistor
Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â* |Â*Â*Â*Â*Â*Â*Â* |Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â* +-- RS232-status
Â*Â*Â*Â*Â*Â*Â*Â* GND -----+Â*Â*Â*Â*Â*Â*Â* |Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â* |Â*Â* derived power
Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â* GND2Â*Â*Â*Â*Â*Â*Â*Â*Â*Â*Â* ---+

There is an insulating barrier between the LED side
and the phototransistor side. The phototransistor
side decides its own fate.

You *could* pass power from one side to the other,
but it must be done with a transformer, in the form
of AC power. So if you decide you need more power
than the "gimmick way", you use a switcher on the left-hand
(+5V) side and pass a high frequency power signal
through a transformer. And the transformer has
to have the same kind of withstanding as the
isolation on the optoisolator.

This is a boring enough topic, that we were, in effect,
contracting ours out. The amount of engineering (from
a "gathering the specs" point of view) is such, it isn't worth
it to do your own.

What you do want to know though, is how much power they
need to make a scheme work, and what baud rate the
poor thing can run at. There are lots of optos out
there which are not very speedy. Passing a 10MHz signal
with optos, used to be a bitch. There are plenty of
slow optos though, if you need, say, 300 baud.

The first time you do a home project like this, and
see the waveforms coming out of your home-made opto,
you'll have more respect for the people who make
good ones for a living.

Â*Â* Paul


And no power pins I can see on a DB25 conenctor:

https://opengear.zendesk.com/hc/en-u...nnector-pinout

They must be using a gimmick as you say.

Mark Lloyd wrote:
On 8/15/19 12:58 PM, Paul wrote:

[snip]

So it's parallel, four bits at a time, with two signals mixed
on the cable at the same time.

4-bit parallel, or 4-lane serial (like PCIe x4)?


Page 4. At the RGMII, nibbles are sent. MS nibble, LS nibble.
Ths means there is no notion of lanes, and the byte stream
is smeared across the interface.

https://e2e.ti.com/cfs-file/__key/co...Iv1_5F00_3.pdf

The PHY is available as a separate chip, with RGMII interface.

http://ww1.microchip.com/downloads/e.../00002117f.pdf

There is 8B10B encoding, which likely doesn't smear that
nicely across four pairs. Perhaps the information can be
considered to be traveling in "blocks", until the bytes
(in nibble by nibble mode) come out the other side.

More than two bits are encoded in the PAM-5 on a pair.
That means, in a bit time, 8 bits are transmitted, plus
enough levels left over for an error correction scheme.
But since the encoding is 8B10B, there is a need to
transmit in 10 bit groups at some level, which means the
pattern on the wires probably repeats after 4 bytes
are sent (5 bytes on the wire, 5 clock cycles).

I think that means the scheme is likely parallel in a sense.
Because the RGMII works that way, and doing conversion from
byte parallel to "lanes" would entail the usage of "memory",
and chip designers *hate* memory :-) The cheap *******s don't
even want to put decent packet buffers in their chips.
(Data is DMA transferred to a buffer ring, and the smaller
the internal buffer that feeds the DMA scatter/gather list,
the happier the chip designers are.)

I haven't seen a lot of bit-wise diagrams for the
encoding scheme inside the PHY.

This document describes the steps to making the analog
waveforms on the GbE Ethernet cable. The devices need
ADCs on the wire pairs, to feed the DSP section for recovery.
The PAM levels need to be sliced, wander tracked and so on.
Talk of such things, means the author of the doc doesn't
need to label any data bits.

https://www.iol.unh.edu/sites/defaul...ase/ge/pcs.pdf

Paul

Sam E wrote:
On 8/15/19 8:28 AM, Andy Burns wrote:
Sam E wrote:

Ethernet is serial

If you want to phrase it like that, then if it's faster than 100Mbps
and over copper, it's parallel :-)

Sounds like nonsense. The definitions of "serial" and "parallel" have
nothing to do with speed or conductor material.


You can't make the definitions too inflexible, or you ruin
your ability to ever use the word or words.

This is part of being engineers, is getting into fights about
what the definitions mean. And not allowing people to run off
into the woods with "only a definition they accept".

"Gear changers" or "Gear grinders" in logic blocks, don't
have any clear definitions. All we know is some rates
have to be preserved NxM = AxB perhaps. The individuals
eventually implementing the interface, have to agree on
data order, or they're "doomed" and will be made fun of
in chip design review.

"Bit serial" is pretty obvious. You have only one "wire channel",
even if it's a diff pair. If a stream of localized bits go across
it in some bit order, and there is only one way to ship them,
there's little to get wrong (at least compared to some of the
schemes of transmission!).

"Parallel" implies bytes traveling straight across wires.
There should be a power of two relationship perhaps, if
a byte (8 bits) needs to travel over 4 wires. You might
send the MSnibble first, then the LSNibble. Back in the day,
schemes like this were kept simple. We didn't have gates
to waste on very fancy circuits. Especially at high speeds,
when a 10Gbit/sec chip only had 2000 gates.

However, "block tranmission" might take a quantity of
information stored in a RAM, carry out some complex encoding
and send it across the wire. Maybe at wire level, you can't
(or prefer not) to attempt to point to individual bits. The
transmitter and receiver have to agree on how the data is
munged and unmunged. An example of a block used sometimes
in situations like that is an "orthogonalizer". Again, engineers
use wordy stuff like that, as the diagram for one of those
fills about half a page of paper. And yes, you have to draw
enough of the device in a diagram, so that the parties on
either end of the black box, "agree" on how it works.

Block transmission is parallel in the sense that the
bits are all synchronous to one clock. You might
conclude a degree of parallel behavior if it worked
that way.

PCI Express uses "lanes", and the relationship between
wires is less certain and more flexible. PCI Express
can actually survive wire pair failures. It has
a lane reversal feature (dunno when that is triggered).
If some MSlanes are damaged, it can switch to x8 mode
on a x16 interface and carry on. And the user might not
notice (on a video card). However, if the lane0 were
to fail, and the implementation does not support lane
reversal, the interface might conk out.

Should we call PCI Express "parallel" ? Only in the
sense of bulk data flow. 16 lanes times 500MB/sec
equals some number, and the data is "transmitted in parallel".
But due to the complexity of the lane handling, it's better
to emphasize the lane-nature of the interface, as it
serves as a memory tweak as to just how flexible
that beast is. It's much more robust than some other
ways of doing it, but it has a gate count to match.
It even has some sort of deskew features, somewhere
in there... It can tolerate mis-matches in lane length,
up to a point.

For example, on the traditional PC parallel port, if
one of the pins snaps on you, you're ****ed. That's if
you expect *all* the modes to work properly, and you
happen to need that mode to work. Old cases like this
are all too easy to understand.

https://computer.howstuffworks.com/parallel-port1.htm

Modern stuff is way too complex (and undocumented)
to be too picky about some of the definitions.

Paul

Mark Lloyd wrote:
On 8/15/19 4:38 PM, Carlos E.R. wrote:

[snip]

Ethernet is serial. it's not RS232.


And USB.

USB3 has the same unknown as 1G ethernet (is it parallel or multilane
serial)?.


That one (USB3) is (fortunately) easy. Five contacts in the
connector run at USB3 rates. They have chosen to only use
either the USB3 five pins or the USB2 four pins, but not
both at the same time. A connector might, for example, negotiate
over USB2, then switch to USB3 for actual operation, then switch
back to USB2 if "something failed" (needs a bus reset).

TX+ \___ single logical channel ==
TX- /
GND
RX+ \___ single logical channel ==
RX- /

VCC USB2 pins...
D+
D-
GND

That means, serial, full duplex (able to work in both directions
at the same time).

Definitely serial. The line rate is higher than the delivered
rate, to account for the encoding on the line.

USB 3.1 Gen 1 - SuperSpeed, 5 Gbit/s (0.500 GB/s) data signaling
rate over 1 lane using 8b/10b encoding;

USB 3.1 Gen 2 - SuperSpeed+, new 10 Gbit/s (1.212 GB/s) data rate
over 1 lane using 128b/132b encoding.

There will be a symbol on the wire, suitable for framing, so you
can make the decoder work. On some of the older hardware standards,
that might be a K28.5 . (Note that the USB group could use something
different if they wanted. There are left over codes...)

https://en.wikipedia.org/wiki/8b/10b_encoding

This means the serial stream on the wire, has additional bits stuffed
in as part of the encoding method. This provides DC balance,
transitions suitable for clock recovery, or whatever.

*******

And for you kids playing along at home, even PCI Express
fails (to impress). I've had cases here, where I boot
the computer, and discover (by various means) that a
lane in my computer, came up in an inferior mode,
requiring a reboot. I *hate* when that happens :-)

Just imagine how often that's going to happen when
PCIe4 and PCIe5 are deployed. What a zoo that's going to
be. Will anyone notice ? I have my popcorn ready.

Paul

nospam wrote:
In article , wrote:

Oh and get this, and I have seen this before, the
iMac he was so proud of was running Windows 7.
I wish they tell me when they do this as it would
be a lot less research on my part to get instructions
on how to do things on Mac OS. Oh well, I now
have a keeper file on ho to configure USB to RS232
devices on Mac OS. Wonder if I will ever use it?

there's nothing to configure with mac os. plug it in and a serial port
becomes available.

The customer is calling the manufacturer of the
interface software on the computer side to see if
they can figure out why the two extra lines.

He currently have it configured for 9600 baud,
7 data bits, 2 stop bits, and Xon/Xoff. Something
does not smell right. But, I probably will never know.

usually it's 8/1/n, which is set by the app using the port.

If you're Googling, you state that as "8N1".

If I search on 7N2, I get here for example.

https://www.practicalmachinist.com/v...chnc-i-155090/

If you know the name of the machine, some old
fart will have commented on the defined mode for it.

https://www.cnczone.com/forums/fanuc...ontroller.html

"nothing we do can make this serial port communicate correctly.

(Set for 9600 7 N 2, XON/XOFF, but we've tried literally everything,
three times each)"

So you'd reduce the baud rate, turn off XON/XOFF, and try and
make basic character transmission work first. Then you'd
work your way up, a step at a time.

On autobaud setups, you might never get a handle
on what is happening. Back in the old days, we would look
at the "bogus" character stream, for evidence we were
over or under on the detected rate, to try and figure out
how to keep a piece of crap equipment, happy. I can't see
power-cycling a CNC machine to be all that practical, if
this is how it works. If the equipment has a control
terminal where you can set the rate, that is so much better.
For some reason "control-U" sticks in my mind from that
era. That might be the bogus character you get if the
receiver is running faster than it is supposed to.
I forget all that stuff now.

Paul

Paul wrote:

If you're Googling, you state that as "8N1".
If I search on 7N2,

The only time (in the late 80s) I ever had to use 7N2, was when a
mainframe was sending 7E1 but the local equipment connected via a mux
had no option to ignore parity errors, so setting it for 7N2 let it
"eat" the parity bit as an extra stop bit ... a kludge but it worked
when nothing else did.

T wrote:

And no power pins I can see on a DB25 conenctor:

https://opengear.zendesk.com/hc/en-u...nnector-pinout


They must be using a gimmick as you say.


An example of the scheme is in the epanorama article.
Diodes are used to provide a one way path to charge
a cap, and which ever status pin is driving the
desired potential at the time, charges the cap.
Only a few milliamps can be "harvested" that way.

http://www.epanorama.net/circuits/rspower.html

*******

As for why there isn't power on the connector,
part of it was probably a lack of imagination.

Also, being cost focused, they want to keep the
connector design as cheap as possible (pressed
metal pins, not milled). And even though the
design is pretty cheap, the retail price of the
connectors isn't all that impressive. Imagine
what it would have cost to put recessed or
advanced power pins on the serial port connector.

*******

If computers had the VGA connector designed
properly, it would have looked like this.
The RGB pins are RF quality. You could drive
a higher resolution signal, without reflections
or ghosting. That's the idea behind these, even
though the res never got all that high where
these were involved.

https://en.wikipedia.org/wiki/DB13W3

And some companies did do crazy things for power.
Apple put +25V or so on their monitor cable, so
the monitor would not need its own AC cord, and
could get the desired power directly from the
computer chassis. It's a great mechanism for lock-in.

Paul

On 16/08/2019 22.28, T wrote:
On 8/15/19 4:14 AM, Carlos E.R. wrote:
Implementing an RS232 is easier.

If you know the baud rate, byte size, stops bits, and handshaking.
Plus, null modem or straight through.

My experience, not a lot of information is always forthcoming
and you have to figure it out on your own

Sorry, I meant that implementing the RS232 hardware in a new design
(say, a mains voltage meter) is almost trivial. With some microcomputers
it might already be there in some cpu pins.

--
Cheers, Carlos.

On 17/08/2019 05.55, Paul wrote:
T wrote:

....


If computers had the VGA connector designed
properly, it would have looked like this.
The RGB pins are RF quality. You could drive
a higher resolution signal, without reflections
or ghosting. That's the idea behind these, even
though the res never got all that high where
these were involved.

https://en.wikipedia.org/wiki/DB13W3

And some companies did do crazy things for power.
Apple put +25V or so on their monitor cable, so
the monitor would not need its own AC cord, and
could get the desired power directly from the
computer chassis. It's a great mechanism for lock-in.

:-)

Amstrad did the reverse: they put the PSU in the monitor, with two
cables going to the computer. The rationale was smaller computer without
need for a fan. Except when a hard disk was installed, there was already
a seat for a fan there.

--
Cheers, Carlos.

On 16/08/2019 18.52, Mark Lloyd wrote:
On 8/15/19 12:58 PM, Paul wrote:

[snip]

So it's parallel, four bits at a time, with two signals mixed
on the cable at the same time.

4-bit parallel, or 4-lane serial (like PCIe x4)?

That's serial in my book. Parallel is 8 wires. One word per bus clock
cycle, one pin per bit.

But my book did not consider these, so I would say multilane serial.

--
Cheers, Carlos.

Carlos E.R. wrote:
On 16/08/2019 18.52, Mark Lloyd wrote:
On 8/15/19 12:58 PM, Paul wrote:

[snip]

So it's parallel, four bits at a time, with two signals mixed
on the cable at the same time.
4-bit parallel, or 4-lane serial (like PCIe x4)?

That's serial in my book. Parallel is 8 wires. One word per bus clock
cycle, one pin per bit.

But my book did not consider these, so I would say multilane serial.


In a PC, parallel can involve narrower buses.

Take LPC (the Low Pin Count bus), which has been used as
a replacement for SMBUS for some devices. (DIMMs are
still on SMBUS.)

https://en.wikipedia.org/wiki/Low_Pin_Count

LCLK: 33.3 MHz clock, provided by the host.
LRESET#: Active-low bus reset.
LFRAME#: Beginning of an LPC bus transaction, driven by host
LAD[3:0]: These four bidirectional signals carry
multiplexed address, data, and other information.

In round numbers, that transfers at ~16MB/sec.
It's a nibble wide at 33MHz. Actually, the Wikipedia article
does us a service by quoting the exact BIOS chip read rate...

throughput of 15.63 MB/s [uses long burst]

It could transfer a BIOS flash chip in about half a second,
on reads. Although a lot of BIOS chips today are serial,
and might be connected to their own serial bus of some sort.
The BIOS chips that are only eight pins, have limited
interface opportunities.

At one time, BIOS chips (DIP package) were even wider. But the I/O rate
probably wasn't all that high. They didn't have burst capability
that I know of. Present address, get data 70ns later,
async style. The address and data each had their own pins.
You had to hold the address steady until the transaction
was finished.

Paul